The members of Antmicro Labs' will find themselves working with a variety of open source projects, spanning from open source software and open research through open hardware, open FPGA and open silicon. You might be building IoT devices running operating systems like Linux, Android and Zephyr or Contiki‑NG, simulating multi-node wireless networks with the open source Renode framework, developing drones based on PX4, robots using ROS, working with open source FPGA design using tools like Chisel, SymbiFlow or LiteX, building implementations of the open RISC‑V ISA, or working with AI, video processing and machine learning using tools such as Caffe, TensorFlow, PyTorch and OpenCV.
RISC‑V is an open source Instruction Set Architecture (ISA) which is set to replace many of the non-standard, proprietary cores still prevalent in the industry today. Developed at Berkeley and backed by all the important players (including Google, NXP, Qualcomm, Western Digital and NVIDIA), RISC‑V is effectively becoming the world's preferred computer architecture. Antmicro is a Platinum Founding Member of the RISC‑V Foundation, actively working with RISC‑V in many open source and commercial perspectives - so that members of Antmicro Labs' are in a unique position to work with some of the key people in the RISC‑V ISA ecosystem.
